IEEE CTS CAS/SSC Seminar: Design Techniques for High Performance Continuous-time Delta Sigma Modulators

Share

To join the email list of CTS CAS/SSC Chapter, please send an email to swilk@ieee.org. Our website is at http://ewh.ieee.org/r5/central_texas/cas_ssc/. The linked group is "IEEE CTS SSC/CAS Joint Chapter".


Talk by Prof. Shanthi Pavan



  Date and Time

  Location

  Contact

  Registration



  • 201 East 24th St
  • Austin, Texas
  • United States 78712
  • Building: POB
  • Room Number: 2.402
  • Click here for Map

Staticmap?size=250x200&sensor=false&zoom=14&markers=30.2867487%2c 97
  • See link to map above. Occasionally you might find street level parking for free -- but watch out for the parking signs and restrictions. Another place to park is SJG, the San Jacinto Garage -- after 6PM, it is $7 to park all night.

  • Starts 17 November 2015 02:25 PM
  • Ends 05 February 2016 03:00 PM
  • All times are US/Central
  • No Admission Charge
  • Register


  Speakers

Shanthi Pavan of IIT Madras

Topic:

Design Techniques for High Performance Continuous-time Delta Sigma Modulators

The designer of a continuous-time delta sigma modulator is faced with a myriad choices - how should I choose the oversampling ratio, order of the noise transfer function, and number of quantizer levels in my design? What architecture should I employ for the loop filter? What DAC should I use? What kind of opamp(s) are apt? After all, every published work seems to demonstrate the efficacy of the authors’ design choices. 

This talk, in a tutorial fashion, dissects various choices and design and hopes to infuse clarity into the design process. Practical design examples, and case studies that present an apple-to-apple comparison of some popular techniques will be discussed.

Biography:

Shanthi Pavan obtained the B.Tech degree in Electronics and Communication Engg from the Indian Institute of Technology, Madras in 1995 and the M.S and Sc.D degrees from Columbia University, New York in 1997 and 1999 respectively. From 1997 to 2000, he was with Texas Instruments in Warren, New Jersey, where he worked on high speed analog filters and data converters. From 2000 to June 2002, he worked on microwave ICs for data communication at Bigbear Networks in Sunnyvale, California. Since July 2002, he has been with the Indian Institute of Technology-Madras, where he is now a Professor of Electrical Engineering. His research interests are in the areas of high speed analog circuit design and signal processing.

Dr.Pavan is the recipient of the IEEE Circuits and Systems Society Darlington Best Paper Award (2009), the Shanti Swarup Bhatnagar Award and the Swarnajayanthi Fellowship (from the Government of India) , the Young Faculty Recognition Award (from IIT Madras for excellence in teaching), the Technomentor Award from the India Semiconductor Association (2010). He is the Editor-in-Chief of the IEEE Transactions on Circuits and Systems: Part I - Regular Papers. He is a Fellow of the Indian National Academy of Engineering. 

Address:Texas, United States

Shanthi Pavan of IIT Madras

Topic:

Design Techniques for High Performance Continuous-time Delta Sigma Modulators

Biography:

Address:Texas, United States





Agenda

6-6:15 social 

6:15-7:15 talk