Demystifying Signal Integrity in High-Speed Designs: A public lecture on EMC by IEEE Distinguished Lecturer Prof. Ram Achar


Abstract:With the increasing demands for higher signal speeds coupled with the need for decreasing feature sizes, signal integrity effects such as delay, distortion, reflections, crosstalk, ground bounce and electromagnetic interference have become the dominant factors limiting the performance of high-speed systems. These effects can be diverse and can seriously impact the design performance at all hierarchical levels including integrated circuits, printed circuit boards, multi-chip modules and backplanes. If not considered during the design stage, signal integrity effects can cause failed designs. Since extra iterations in the design cycle are costly, accurate prediction of these effects is a necessity in high-speed designs. Consequently, preserving signal integrity has become one of the most challenging tasks facing designers of modern multifunction and miniature electronic circuits and systems.  This talk provides a comprehensive approach for understanding the multidisciplinary problem of signal integrity: issues/modeling/analysis in high-speed designs.

  Date and Time




  • Stellenbosch University
  • cnr Bosman Street and Banghoek Road
  • Stellenbosch, Western Cape
  • South Africa 7600
  • Building: E&E Engineering
  • Room Number: 2nd Floor Reception Area

Staticmap?size=250x200&sensor=false&zoom=14&markers= 33.928191%2c18
  • Starts 11 April 2016 08:00 AM
  • Ends 29 April 2016 11:00 AM
  • All times are Africa/Johannesburg
  • No Admission Charge
  • Register


Prof Ram Achar of Carleton University


Demystifying Signal Integrity in High-Speed Designs



Address:Ottowa, Ontario, Canada


9h00: Welcoming and introduction (Gideon Wiid)
9h05: Main event (Prof Ram Achar)
10h00: Refreshment Break
10h20: Main Event (Prof Ram Achar)
10h50: Conclusion, Q&A